型号ATTINY88-AU
品质原装
库存现货
包装真空
仓库深圳仓库
ATtiny88 Automotive 8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash DATASHEET Features High performance, low power AVR 8-Bit microcontroller Advanced RISC architecture 123 powerful instructions most single clock cycle e...
Special Microcontroller Features– debugWIRE On-Chip Debug System– In-System Programmable via SPI Port– Power-On Reset and Programmable Brown-Out Detection– Internal Calibrated Oscillator– External and Internal Interrupt Sources– Three Sleep Modes: Idle, ADC Noise Reduction and Power-Down– On-Chip Temperature Sensor•
ThePC7 and PC[5:0] output buffers have symmetrical drive characteristics with both sink and sourcecapability. As inputs, Port C pins that are externally pulled low will source current if the pull-upresistors are activated. The Port C pins are tri-stated when a reset condition becomes active,even if the clock is not running.1.1.7PC6/RESETIf the RSTDISBL Fuse is programmed,
I/O and Packages– 24 Programmable I/O Lines:• 28-pin PDIP• 28-pad QFN– 28 Programmable I/O Lines:• 32-lead TQFP• 32-pad QFN• 32-ball UFBGA•Operating Voltage:–1.8–5.5V•Temperature Range:–-40°C to +85°C•Speed Grade:–0–4 MHz @ 1.8 – 5.5V–0 – 8 MHz @ 2.7 – 5.5V–0 – 12 MHz @ 4.5 – 5.5V•Low Power Consumption– Active Mode: 1 MHz, 1.8V: 240 μA– Power-Down Mode: 0.1 μA at 1.8V
1.1Pin Descriptions1.1.1VCCDigital supply voltage.1.1.2AVCCAVCC is the supply voltage pin for the A/D converter and a selection of I/O pins. This pin shouldbe externally connected to VCC even if the ADC is not used. If the ADC is used, it is recom-mended this pin is connected to VCC through a low-pass filter, as described in “Analog NoiseCanceling Techniques” on page 172.The following pins receive their supply voltage from AVCC: PC7, PC[5:0] and (in 32-lead pack-ages) PA[1:0].
The ATtiny48/88 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISCarchitecture. By executing powerful instructions in a single clock cycle, the ATtiny48/88 achievesthroughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-sumption versus processing speed.
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